1. Field of the Invention
The present invention relates generally to thin film capacitors having high dielectric constants and more particularly to thin film dielectric articles comprising a thin film layer of ferroelectric material in combination with a thin film layer of an amorphously configured low leakage dielectric material.
2. Description of the Related Art
In forming dielectric articles such as semiconductor integrated circuit devices, it is desirable to utilize capacitive elements that have high capacitance in small dimensioned, planar structures to improve the electrical performance and particularly to improve the response of integrated memory circuits. A typical capacitor comprises a pair of electrode layers having dielectric material therebetween. Voltage is applied across the electrode layers and a charge is stored in the capacitor with the amount of charge being storable in the capacitor, e.g. the capacitance, being proportional to the opposing areas of the electrodes and the dielectric material.
Capacitance has also been found to be inversely proportional to the thickness of the dielectric material, thus thin film capacitors are generally seen as a preferable means to achieve high performance. Problems still exit however, in optimizing the performance of thin film capacitors, so there is a continuing need to improve electrical properties, such as attaining higher dielectric constants and lowering charge dissipation factors.
Further, it is often highly desirable in the fabrication of electrical devices such as capacitors to minimize leakage current while maximizing capacitance per unit area.
It has been found that leakage current can be controlled by utilizing Schottky barriers such as lead zirconium titanate (hereinafter PZT) in conjunction with Platinum (hereinafter Pt) electrodes. However, interdiffusion between the PZT layer and bottom electrodes of capacitors of this type has been a problem in that deterioration of the electrical properties of the capacitors and reduced crystallinity of the PZT films can result. A preferred embodiment of the present invention provides a structure combining PZT and one or more BaTiO.sub.3 (hereinafter BTO) layers. According to a preferred embodiment of the present invention, one or more BaTiO.sub.3 layers may be employed to suppress the interdiffusion between Pt electrodes and the Pb element of the PZT layer. In addition, the combination of PZT and BTO according to a preferred method of the present invention has a synergistic effect and acts to increase the crystallinity of the PZT films. Thus, the present invention provides a capacitor having a high dielectric constant and lower leakage current than previously obtainable.
European Patent 46,868 discloses fabrication of capacitor structures using dielectrics having high dielectric constants and discusses some of the problems associated therewith, particularly the tendency of dielectric materials having a high dielectric constant to degrade rapidly at higher temperatures and their forming a capacitor structure that includes dual dielectric layers, comprising a first dielectric layer of silicon nitride or aluminum oxide and a second layer selected from a specific group of selected metal oxides and titanates. Such dual layered dielectric capacitors are said to have high capacitance (epsilon/t&gt;0.04) and satisfactory Pb and dielectric loss.
U.S. Pat. No. 4,734,340 discloses an improved thin film capacitor wherein a particularly thin film dielectric layer, having high dielectric capacitance, is deposited by a sputtering technique and comprises a mixture of tantalum and titanium oxides.
U.S. Pat. No. 4,803,591 discloses an improved capacitor comprising layers of dielectric ceramic compositions of high dielectric constant. The ceramic compositions are characterized as comprising magnesium dioxide together with barium titanate, niobium pentoxide and zinc oxide. The capacitors formed from such ceramic compositions are said to have high dielectric constant with decreased temperature dependency over a wide temperature range.
U.S. Pat. No. 4,873,610 discloses a dielectric article having a laminate of plural thin film dielectric material layers, comprising a combination of dielectric material layers, that have different temperature characteristics of permittivity. The patent specifies that opposing laminates constitute different dielectric compositions for attaining adjacent layers having different temperature characteristics of permittivity. The reference does not disclose or infer that layers constituting the same dielectric material can have different temperature characteristics of permittivity.
U.S. Pat. No. 4,931,897 discloses a semiconductor element and method of manufacture wherein a lower electrode, having a polycrystalline silicon film thereon, is treated so that the silicon film comprises an amorphous silicon surface. A thin film of dielectric material is thereafter deposited on the amorphous silicon surface in such a manner that the amorphous surface does not recrystallize to a polycrystalline form. The stated objective of the patent is to produce an interface, between the polycrystalline silicon film serving as the lower electrode and the dielectric film, that is flat and uniform to prevent pinholes and electric field concentration. The reference does not disclose the formation of a dielectric film having an amorphous and a polycrystalline layer.
Thus, though the prior art is replete with proposed solutions for manufacture of optimized and dielectric articles, such solutions have not sufficiently met the ever increasing demand of the emerging industry for their various uses.